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this is information on a product in full production . december 2015 docid028611 rev 1 1/10 stptic-27l2 parascan? tunable integrated capacitor datasheet - production data features high power capability 5:1 tuning range higher linearity (48x) high quality factor (q) low leakage current compatible with high voltage control ic (sthvdac series) available in wlcsp package 0.75 x 1.00 x 0.3 mm ecopack ? 2 compliant component benefit rf tunable passive implementation in mobile phones to optimize antenna radiated performance applications cellular antenna open loop tunable matching network in multi-band gsm/wcdma/lte mobile phone open loop tunable rf filters description the st integrated tunable capacitor offers excellent rf performance, low power consumption and high linearity required in adaptive rf tuning applications. the fundamental building block of ptic is a tunable material called parascan ? , which is a version of barium strontium titanate (bst) developed by paratek microwave. bst capacitors are tunable capacitors intended for use in mobile phone application and dedicated to rf tunable applications. these tunable capacitors are controlled through an extended bias voltage ranging from 1 to 24 v. the implementation of bst tunable capacitors in mobile phones enables significant improvement in terms of radiated performance making the performance almost insensitive to the external environment. figure 1. ptic functional block diagram tm: parascan is a trademark of paratek microwave in c. 6 7 3 7,& :/&63ppslwfk 37,& 5) 5) %ldv www.st.com
electrical characteristics stptic-27l2 2/10 docid028611 rev 1 1 electrical characteristics table 1. absolute maximum ratings (limiting values) symbol parameter rating unit p in input peak power rf in (cw mode)/all rf ports +40 dbm v esd(hbm) human body model, jesd22-a114-b, all i/o class 1b (1) 1. class 1b defined as passing 500 v, but fails afte r exposure to 1000v esd pulse. v v esd(mm) machine model, jesd22-a115-a, all i/o 100 v t device device temperature +125 c t stg storage temperature -55 to +150 v x bias voltage 25 v table 2. recommended operating conditions symbol parameter rating unit min. typ. max. p in rf input power +33 +39 dbm f op operating frequency 700 2700 mhz t device device temperature +100 c t op operating temperature -30 +85 v bias bias voltage 1 24 v
docid028611 rev 1 3/10 stptic-27l2 electrical characteristics 10 table 3. representative performance (t amb = 25 c otherwise specified) symbol parameter conditions value unit min. typ. max. c 1v capacitance at 1 v bias stptic-27l2 2.8 3.2 3.58 pf c 2v capacitance at 2 v bias stptic-27l2 2.43 2.7 2.97 pf c 20v capacitance at 20v bias stptic-27l2 0.63 0.69 0.75 pf c 24v capacitance at 24 v bias stptic-27l2 0.56 0.61 0.66 pf d c tuning range ratio between c 1v /c 24v (1) 5/1 i l leakage current measured with v bias = 24 v 100 na q lb quality factor measured at 700 mhz at 2 v 50 55 q hb quality factor measured at 2700 mhz at 2 v 35 40 ip3 third order intercept point v bias = 1 v (2)(4) 60 dbm v bias = 24 v (2)(4) 80 v bias = 20 v (2)(4) 80 h2 second harmonic v bias = 1 v (3)(4) -70 -65 dbm v bias = 24 v (3)(4) -80 -75 v bias = 20 v (3)(4) -65 h3 third harmonic v bias = 1 v (3)(4) -55 -45 dbm v bias = 24 v (3)(4) -85 -70 v bias = 20 v (3)(4) -70 t t transition time average for any transition between c min to c max (5) 50 s average transition between c max to c min (5) 30 1. measured at low frequency 2. f 1 = 894 mhz, f 2 = 849 mhz, p 1 = +25 dbm, p 2 = +25 dbm, 2f 1 - f 2 = 939 mhz 3. 850 mhz, p in = +34 dbm, cw 4. ip3 and harmonics are measured in the shunt confi guration in a 50 ? environment 5. one or both of rf in and rf out must be connected to dc ground, using the hvdac tu rbo mode
electrical characteristics stptic-27l2 4/10 docid028611 rev 1 figure 6. third order intercept point (ip3) figure 2. capacitance variation versus bias voltage figure 3. quality factor versus frequency ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( %ldv 9rowdjh9 &s) ?s 4xdolw\idfwru )0+] figure 4. harmonic power versus bias voltage (series) figure 5. harmonic power versus bias voltage (shunt) +vhulh +vhulh %ldv9rowdjh9 +duprqlfsrzhugepslq gepdw0+] +vkxqw +vkxqw %ldv9rowdjh9 +duprqlfsrzhugepslq gepdw0+] ? ? e ? ? ? ? ? e ? ? ? ? ? e ? ? ? ? ? ?? ?? ?e ugrughulqwhufhswsrlqwgepdw 0+] ,3vkxqw ,3vhulh %ldvyrowdjh9
docid028611 rev 1 5/10 stptic-27l2 package information 10 2 package information epoxy meets ul94, v0 lead-free package in order to meet environmental requirements, st off ers these devices in different grades of ecopack ? packages, depending on their level of environmenta l compliance. ecopack ? specifications, grade definitions and product statu s are available at: www.st.com . ecopack ? is an st trademark. 2.1 flip-chip package information figure 7. flip-chip package outline the land pattern below is recommended for soldering the stptic-g2 on pcb. nc stands for no connect, this pad must not be conn ected on application board. please leave this pad floating. / & & & % % % ( ( & & & $ $ ' ' ' %rwwrpylhz edoovxs 7rsylhz edoovgrzq 6lghylhz 1& %,$6 5) 5) table 4. flip-chip package dimensions dimensions (in microns) a1 a2 b1 b2 b4 c1 c2 d1 d2 d3 e1 e2 stptic-27l2 1000 750 140 500 360 105 540 225 90 315 125 165 tolerance 30 30 15 10 15 15 10 20 20 40 20 20
package information stptic-27l2 6/10 docid028611 rev 1 figure 8. recommended pcb land pattern for flip-chi p package 2.2 packing information figure 9. flip-chip tape and reel outline / / ; : : < / / &rsshu ; : : 4pmefsnbtlpqfojoh ?n
mbshfvsuibodpqqfs < table 5. dimensions dimensions l1 w1 l3 l2 w2 l4 x1 x2 y1 y2 typical values (in microns) 160 160 260 210 210 310 320 270 240 190 'rwlghqwli\lqje xps$orfdwlrq 8vhugluhfwlrqrixquhholqj 7\slfdoglphqvlrqvlqpp ? + : / table 6. dimensions pocket dimensions l w h stptic-27l2 1070 820 380
docid028611 rev 1 7/10 stptic-27l2 package information 10 figure 10. flip-chip marking table 7. pinout description pad / ball number pin name description a1 dc bias dc bias voltage b1 rf2 rf input / output (1) 1. when connected in shunt, please connect rf2 (b1 b all) to gnd a2 nc not connected b2 rf1 rf input / output $ $ % % %rwwrpylhz edoovxs / 7rsylhz edoovgrzq
reflow profile stptic-27l2 8/10 docid028611 rev 1 3 reflow profile figure 11. st ecopack ? recommended soldering reflow profile for pcb mount ing note: minimize air convection currents in the reflow oven to avoid component movement. ?&v ?& ?&v 7hpshudwxuh?& ?&v ?&v 7lphv ?&v vhf pd[ table 8. recommended values for soldering reflow profile value typical max. temperature gradient in preheat (t = 70-180 c) 0.9 c/s 3 c/s temperature gradient (t = 200-225 c) 2 c/s 3 c/s peak temperature in reflow 240-245 c 260 c time above 220 c 60 s 90 s temperature gradient in cooling -2 to -3 c/s -6 c/s time from 50 to 220 c 160 to 220 s
docid028611 rev 1 9/10 stptic-27l2 ordering information 10 4 ordering information figure 12. ordering information scheme 5 revision history table 9. ordering information part number marking base qty package delivery mode stptic-27l2c5 27l 15 000 flip-chip tape and reel 6737,&/& 67 0lfurhohfwurqlfv 37,& 3dudvfdq?wxqdeoh ,qwhjudwhgfdsdflwru &dsdflwru ydoxh /lqhdulw\ )6wdqgdug[ *6wdqgdug[ /+ljk[ 3dfndjh 7xqlqj s) s) s) s) s) s) s) s) 04)1 &:/&63 ?pfrdwlqj wxqlqj wxqlqj 3urgxfwidplo\ 0dqxidfwxuhu +:/&63 table 10. document revision history date revision changes 04-dec-2015 1 initial release.
stptic-27l2 10/10 docid028611 rev 1 important notice C please read carefully stmicroelectronics nv and its subsidiaries (st) r eserve the right to make changes, corrections, enha ncements, modifications, and improvements to st products and/or to this document at any time without notice. purchasers should obta in the latest relevant information on st products before placing orders. st products are sold pursuant to sts terms and conditions of sale in place at the time of order acknowledgement. purchasers are solely responsible for the choice, s election, and use of st products and st assumes no liability for application assistance or the design of purchasers products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different fro m the information set forth herein shall void any w arranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replace s information previously supplied in any prior vers ions of this document. ? 2015 stmicroelectronics C all rights reserved

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